Verilog HDL Language Specification
I’m just starting this page to keep track of notes and other content for courses or projects that I’m working on. Definitely more to come.
This website is under development and uses off-the-shelf themes with a static site generator for a quick workflow. Eventually there will be a builtin Latex renderer which should improve the quality of these notes, but I probably won’t get to that any time soon.
EEE333 Hardware Design Language and Verilog
Overview of HDL
EEE333 FPGA Specifics
Some basic FPGA Specs
EEE333 Boolean Algebra Review
Brief tutorial on Boolean Algebra and Karnaugh maps
EEE333 Course Introduction and Concepts
Topics covered; description of HDL and FPGA use-cases